Packets, Clock Rate, and Equivalent Resistance

charge-packet-per-cycle-sets-current

A repeated charge packet becomes an average current ledger. Exact arithmetic here means exact results for the stated model inputs; measured inputs still carry uncertainty and significant-figure limits.

highlighted = computed this step

A repeated packet starts with capacitance and voltage swing

The packet row is downstream of an accepted two-phase cycle and one finite capacitor swing.

ΔQ=CΔV=2 F⋅3 V\Delta Q=C\Delta V=2\ \text{F}\cdot3\ \text{V}
Charge-packet currentAverage current is generated from packet and clock rows.C 2 FdV 3 Vfsw 2 HzQpacket 6 CIavg 12 A

Larger flying capacitance moves a larger packet

The voltage swing and clock frequency stay fixed while capacitance changes.

CΔQIavg1 F3 C6 A2 F6 C12 A3 F9 C18 A\begin{array}{c|c|c}C&\Delta Q&I_{\text{avg}}\\1\ \text{F}&3\ \text{C}&6\ \text{A}\\2\ \text{F}&6\ \text{C}&12\ \text{A}\\3\ \text{F}&9\ \text{C}&18\ \text{A}\\\end{array}

A charge packet per cycle sets average current

The current is packet charge times clock frequency over many identical cycles.

2 F⋅3 V=6 C6 C⋅2 Hz=12 A2\ \text{F}\cdot3\ \text{V}=6\ \text{C}\quad6\ \text{C}\cdot2\ \text{Hz}=12\ \text{A}
Charge-packet currentAverage current is generated from packet and clock rows.C 2 FdV 3 Vfsw 2 HzQpacket 6 CIavg 12 A