A charge-packet-per-cycle-sets-current scan starts with a finite capacitor swing, delta-Q = C * delta-V, then repeats that packet with the switching clock so average current I_avg = delta-Q * f row by row. The arithmetic is exact only for the stated capacitances, voltage swings, packet charges, clock rates, currents, and rows in the ideal capacitor, ideal switch, nonoverlap-clock model. Real switched-capacitor converters add switch resistance, ESR, parasitic capacitance, charge injection, clock jitter, load current, probe/calibration limits, finite precision, and measurement uncertainty.
A repeated charge packet becomes an average current ledger. Exact arithmetic here means exact results for the stated model inputs; measured inputs still carry uncertainty and significant-figure limits.
highlighted = computed this step
A repeated packet starts with capacitance and voltage swing
The packet row is downstream of an accepted two-phase cycle and one finite capacitor swing.
ΔQ=CΔV=2F⋅3V
Larger flying capacitance moves a larger packet
The voltage swing and clock frequency stay fixed while capacitance changes.
C1F2F3FΔQ3C6C9CIavg6A12A18A
A charge packet per cycle sets average current
The current is packet charge times clock frequency over many identical cycles.