Delay Repartition Three-Row Scan - Electronic Circuits XII: Clocks, Latches, and Timing Closure Step by Step

Different stage splits close identically when their checked sum is the same. Exact arithmetic here means exact results for the stated model inputs; measured inputs still carry uncertainty and significant-figure limits.

highlighted = computed this step

One-two-three stages exactly spend the budget

Stage delays 1, 2, and 3 s total 6 s. The budget is 6 s, so slack is 0 s.

1+2+3=6\ \text{s},\quad 6\mathord{-}6=0\ \text{s}

Evenly split stages spend the same budget

Stage delays 2, 2, and 2 s total 6 s. The budget is 6 s, so slack is 0 s.

2+2+2=6\ \text{s},\quad 6\mathord{-}6=0\ \text{s}

A late long stage still closes when the sum is six

Stage delays 1, 1, and 4 s total 6 s. The budget is 6 s, so slack is 0 s.

1+1+4=6\ \text{s},\quad 6\mathord{-}6=0\ \text{s}