A stacked phase output is checked against a voltage ceiling. Exact arithmetic here means exact results for the stated model inputs; measured inputs still carry uncertainty and significant-figure limits.
highlighted = computed this step
The stacked phase is checked against an output ceiling
The source stays fixed while the flying-capacitor voltage changes.
Vout=Vs+VflyVmax=10V
Three flying-capacitor voltages cross the output ceiling
The topology is the same in all rows; only the flying-capacitor voltage changes.
Vfly2V4V6VVout8V10V12Vm2V0V−2V
The final stacked output is above the ceiling
The last row computes a voltage above the ceiling, leaving a negative margin.