packet-current-budget-three-row-scan - Electronic Circuits XVI: Switched-Capacitor Charge and Conversion Step by Step

A packet-current budget is checked by changing only clock frequency. Exact arithmetic here means exact results for the stated model inputs; measured inputs still carry uncertainty and significant-figure limits.

highlighted = computed this step

The current budget starts from a fixed packet size

Capacitance and swing are fixed, so the packet size is fixed before the clock changes.

I_{\text{avg}}=\Delta Q f\quad I_{\max}=6\ \text{A}

Three clock rates show the current boundary

The half-hertz row is below the budget, the one-hertz row is exact, and the fast row fails.

\begin{array}{c|c|c|c}f&\Delta Q&I_{\text{avg}}&m\\\tfrac{1}{2}\ \text{Hz}&6\ \text{C}&3\ \text{A}&3\ \text{A}\\1\ \text{Hz}&6\ \text{C}&6\ \text{A}&0\ \text{A}\\\tfrac{3}{2}\ \text{Hz}&6\ \text{C}&9\ \text{A}&\mathord{-}3\ \text{A}\\\end{array}

The fast clock fails because average current is above budget

The final clock gives too much average current, so the current margin is negative.

m=\mathord{-}3\ \text{A}\quad \text{fail}