A flying-capacitor-stacks-voltage scan holds the source rail fixed and varies the charged flying-capacitor voltage across three rows, checking that the stacked output V_out = V_s + V_fly adds the two row by row. The arithmetic is exact only for the stated source voltages, flying-capacitor voltages, output voltages, and rows in the ideal capacitor, switch, and phase-topology model. Real switched-capacitor converters add switch resistance, ESR, parasitic capacitance, charge injection, timing skew, load current, probe/calibration limits, finite precision, and measurement uncertainty.
A second phase can place a charged flying capacitor above a source. Exact arithmetic here means exact results for the stated model inputs; measured inputs still carry uncertainty and significant-figure limits.
highlighted = computed this step
A stacked phase names the source and flying capacitor
The output row is accepted only after the phase points to one source rail and one charged flying capacitor.
Vs=6VVfly=6V
The stacked output rises one-for-one with flying voltage
The source stays fixed; each row rebuilds the phase with a different flying-capacitor voltage.
Vs6V6V6VVfly4V6V8VVout10V12V14V
Stacking adds the source and flying voltage
The output label is accepted only from the declared phase topology.