The final timing decision is a source-bound ledger. Exact arithmetic here means exact results for the stated model inputs; measured inputs still carry uncertainty and significant-figure limits.
highlighted = computed this step
The audit cites both passing and failing timing sources
The passing setup and hold slacks are each 1 second, while the contrast cases stay rejected.
ssetup=1s,shold=1s
The delay chain closes with zero slack
The delay total is 6 seconds and the chain slack is 0 seconds.
6s,schain=0s
Timing closure is accepted only after every source agrees
The latch captures, the edge capture succeeds, and the final accepted bit is 1.