One Extra Delay Breaks the Same Path - Electronic Circuits XII: Clocks, Latches, and Timing Closure Step by Step

Changing one stage delay can turn zero slack into negative slack. Exact arithmetic here means exact results for the stated model inputs; measured inputs still carry uncertainty and significant-figure limits.

highlighted = computed this step

One extra second breaks the same path

Changing only the last stage to 2 seconds makes the total delay 7 seconds.

2+3+2=7\ \text{s}

Delay rows cross from closed to rejected

Each row keeps the same clock budget and recomputes total delay and slack.

\begin{array}{c|c|c}d_{\text{total}}&s_{\text{chain}}&\text{gate}\\6\ \text{s}&0\ \text{s}&\text{pass}\\7\ \text{s}&\mathord{-}1\ \text{s}&\text{fail}\\8\ \text{s}&\mathord{-}2\ \text{s}&\text{fail}\\\end{array}

The delay total exceeds the relative budget

The budget remains 6 seconds, so the slack becomes -1 second and the path is rejected.

6\ \text{s}+(-7\ \text{s})=-1\ \text{s}