Rails Are Levels - Electronic Circuits IV & XII: Digital Logic and Timing Closure Step by Step

A rails-are-levels scan pins the digital bit names to exact voltage rails, treating LOW and HIGH as shorthand for V_LOW = 0 V and V_HIGH = 5 V rather than separate units. The arithmetic is exact only for the stated rail voltages, logic states, and rows in the ideal rail-logic model. Real gates add noise-margin limits, supply tolerance, input leakage, finite rise time, loading, probe/calibration limits, finite precision, and measurement uncertainty.

Digital LOW and HIGH are modeled as exact voltage levels, not as new physical units. Exact arithmetic here means exact results for the stated model inputs; measured inputs still carry uncertainty and significant-figure limits.

highlighted = computed this step

The low rail is a voltage

The LOW rail is 0 volts. The bit name is not a separate unit.

V_{\text{LOW}} = 0\ \text{V}

The high rail is another voltage

The HIGH rail is 5 volts. Digital state names are shorthand for voltage ranges.

V_{\text{HIGH}} = 5\ \text{V}