NOR Requires Either Closed - Electronic Circuits IV & XII: Digital Logic and Timing Closure Step by Step

A nor-requires-either-closed scan models the NOR as a pull-up with parallel pull-down branches, checking that the output pulls LOW when either input closes its branch while only both-LOW leaves V_out = 5 V row by row. The arithmetic is exact only for the stated input states, output voltages, switch states, and rows in the ideal switch, pull-up, and logic-threshold model. Real switch networks add on resistance, leakage, input threshold variation, fanout/loading, finite rise time, probe/calibration limits, finite precision, and measurement uncertainty.

A NOR gate is modeled as a pull-up with parallel pull-down branches. Exact arithmetic here means exact results for the stated model inputs; measured inputs still carry uncertainty and significant-figure limits.

highlighted = computed this step

Both LOW inputs leave both branches open

With both inputs LOW, neither parallel pull-down branch conducts. The output is 5 volts.

\text{LOW, LOW} \Rightarrow V_{\text{out}} = 5\ \text{V}

Either closed branch pulls low

Make one input HIGH. That one branch is enough to pull the output to 0 volts.

\text{LOW, HIGH} \Rightarrow V_{\text{out}} = 0\ \text{V}