Inverter From Switches - Electronic Circuits IV & XII: Digital Logic and Timing Closure Step by Step

An inverter-from-switches scan pairs a pull-up with a controlled pull-down, checking that a LOW input leaves V_out = 5 V and a HIGH input closes the pull-down to give V_out = 0 V row by row. The arithmetic is exact only for the stated input voltages, output voltages, switch states, and rows in the ideal switch, pull-up, and logic-threshold model. Real switch networks add on resistance, leakage, input threshold variation, fanout/loading, finite rise time, probe/calibration limits, finite precision, and measurement uncertainty.

A pull-up plus controlled pull-down turns a HIGH input into a LOW output and a LOW input into a HIGH output. Exact arithmetic here means exact results for the stated model inputs; measured inputs still carry uncertainty and significant-figure limits.

highlighted = computed this step

LOW input leaves the pull-down open

With input 0 volts, the switch is open and the output is 5 volts.

\text{LOW in} \Rightarrow V_{\text{out}} = 5\ \text{V}

HIGH input closes the pull-down

With input 5 volts, the pull-down path closes and the output becomes 0 volts.

\text{HIGH in} \Rightarrow V_{\text{out}} = 0\ \text{V}