NOR Parallel Truth Table Scan - Electronic Circuits IV & XII: Digital Logic and Timing Closure Step by Step

A NOR pull-down uses parallel branches, so the all-low row is the only case with every branch open, and any HIGH input closes a branch to ground for a LOW output. The four rows read 0,0 to 1,1 with output 1, 0, 0, 0 exactly for the ideal switch model; real gates add threshold spread, fanout loading, leakage, propagation delay, supply variation, contact resistance, noise, temperature drift, and voltage and timing measurement uncertainty.

A NOR table becomes readable when the parallel pull-down branches are scanned row by row. Exact arithmetic here means exact results for the stated model inputs; measured inputs still carry uncertainty and significant-figure limits.

highlighted = computed this step

NOR asks whether any parallel branch is closed

A NOR pull-down has parallel branches. The all-low row leaves every branch open, but any HIGH input closes a branch to ground.

\text{any closed branch}\Rightarrow Y=0

Four rows show the first closed branch

The scan separates the all-open case from the three rows with at least one closed branch. That is the topology reason NOR differs from NAND.

\begin{array}{c|c|c|c}A&B&\text{pull-down}&Y\\\text{LOW}&\text{LOW}&\text{open}&1\\\text{LOW}&\text{HIGH}&\text{closed}&0\\\text{HIGH}&\text{LOW}&\text{closed}&0\\\text{HIGH}&\text{HIGH}&\text{closed}&0\\\end{array}

The compact NOR table keeps the branch audit

The table is small, but it still comes from four rendered-style topology cases. The state tokens are pinned helper outputs.

\begin{array}{ccc} A&B&Y\\0&0&1\\0&1&0\\1&0&0\\1&1&0\end{array}