This full-table-recomputed lesson rebuilds every LOW/HIGH input pair from the same ideal NAND switch topology instead of copying a memorized table. The compact output cells are exact only for the stated ideal switch rows and the helper that maps conducting pull-down paths to LOW outputs. Real digital circuits add thresholds, finite output resistance, leakage, fanout loading, propagation delay, noise margins, and measurement uncertainty.
A full truth table is an audit trail over all exact input rows. Exact arithmetic here means exact results for the stated model inputs; measured inputs still carry uncertainty and significant-figure limits.
highlighted = computed this step
Every row is recomputed
The helper enumerates every LOW and HIGH input pair and calls the same NAND switch-network helper for each pair.
rows=all LOW/HIGH input pairs
The compact table uses pinned bit tokens
The compact cells are state tokens produced by the helper. Raw typed bit digits are rejected by the engine surface.