A loaded divider is checked as a topology calculation: the load changes the lower branch before the output voltage is read. Exact arithmetic here means exact results for the stated model inputs; measured inputs still carry uncertainty and significant-figure limits.
highlighted = computed this step
A load is another resistor on the output node
The load is not a caption on the divider. It is a parallel path from the output node to the return wire, so it changes the lower equivalent resistance before the divider voltage is computed.
Rlow=Rb∥RL,Vo=IsRlow
The loaded lower branch sets the output voltage
Read each row left to right. First combine the bottom resistor and load as a parallel resistance; then the source current sets the output voltage across that combined branch.
After the output voltage is known, the bottom resistor current and load current are separate Ohm-law reads. Their sum must return to the source current.
In the rendered row, the top resistor drops 12 volts and the output branch drops 6 volts. The two branch currents are 2 amperes and 2 amperes.
12V+6V=18V,2A+2A=4A
Loading is a network calculation, not a label
The output is smaller than an unloaded equal-resistor divider would suggest because the load is part of the network. The table, diagram, and current split all cite the same topology.