packet-current-sets-output-power - Electronic Circuits XVI: Switched-Capacitor Charge and Conversion Step by Step

Power is only accepted from a cited output voltage and packet current. Exact arithmetic here means exact results for the stated model inputs; measured inputs still carry uncertainty and significant-figure limits.

highlighted = computed this step

Output power first cites voltage and packet current

The power row is downstream of a phase-derived output voltage and a packet-derived average current.

V_{\text{out}}=4\ \text{V}\quad I_{\text{avg}}=12\ \text{A}

More packet current gives proportionally more output power

The output voltage stays at the split midpoint while the packet clock changes current.

\begin{array}{c|c|c}I_{\text{avg}}&V_{\text{out}}&P_{\text{out}}\\6\ \text{A}&4\ \text{V}&24\ \text{W}\\12\ \text{A}&4\ \text{V}&48\ \text{W}\\18\ \text{A}&4\ \text{V}&72\ \text{W}\\\end{array}

Packet current sets output power only after voltage is cited

Efficiency is not inferred; this row only multiplies a cited output voltage by a cited packet current.

4\ \text{V}\cdot12\ \text{A}=48\ \text{W}