output-power-voltage-current-scan - Electronic Circuits XV & XVI: Transformers and Switched-Capacitor Conversion Step by Step

Output power in this switched-capacitor ledger multiplies the cited output voltage by the cited average packet current. The rows do not claim efficiency or loss behavior; real converters dissipate energy in switches, capacitors, routing, clocking, regulation ripple, load transients, and measurement uncertainty.

Output power needs both a phase-derived voltage and a packet-derived current. Exact arithmetic here means exact results for the stated model inputs; measured inputs still carry uncertainty and significant-figure limits.

highlighted = computed this step

Output power has a voltage factor and a current factor

The voltage comes from the phase topology and the current comes from the packet clock.

P_{\text{out}}=V_{\text{out}}I_{\text{avg}}

Voltage rows and current rows both scale power

The first group changes the split-output voltage; the second group changes packet current by changing clock frequency.

\begin{array}{c|c|c|c}\text{scan}&V_{\text{out}}&I_{\text{avg}}&P_{\text{out}}\\V_{\text{out}}\ \text{changes}&3\ \text{V}&12\ \text{A}&36\ \text{W}\\V_{\text{out}}\ \text{changes}&4\ \text{V}&12\ \text{A}&48\ \text{W}\\V_{\text{out}}\ \text{changes}&5\ \text{V}&12\ \text{A}&60\ \text{W}\\I_{\text{avg}}\ \text{changes}&4\ \text{V}&6\ \text{A}&24\ \text{W}\\I_{\text{avg}}\ \text{changes}&4\ \text{V}&12\ \text{A}&48\ \text{W}\\I_{\text{avg}}\ \text{changes}&4\ \text{V}&18\ \text{A}&72\ \text{W}\\\end{array}

The final power row multiplies two cited sources

No efficiency is inferred here; the row only multiplies a cited output voltage by a cited average current.

4\ \text{V}\cdot12\ \text{A}=48\ \text{W}