holdup-time-comes-from-allowed-droop - Electronic Circuits XIII: Power, Rectification, and Regulation Step by Step

Capacitance and allowed voltage droop determine a finite holdup time. Exact arithmetic here means exact results for the stated model inputs; measured inputs still carry uncertainty and significant-figure limits.

highlighted = computed this step

Holdup time is charge budget divided by load current

The capacitor may droop by 3 V while feeding 2 A. That finite charge budget sets the supported time.

\Delta Q=C\Delta V,\qquad \Delta t={\Delta Q\over I}

More capacitance or droop gives more holdup time

The current is fixed, so the scan shows how the charge budget grows before division by current.

\begin{array}{c|c|c|c}C&\Delta V&I&\Delta t\\2\ \text{F}&2\ \text{V}&2\ \text{A}&2\ \text{s}\\2\ \text{F}&4\ \text{V}&2\ \text{A}&4\ \text{s}\\4\ \text{F}&4\ \text{V}&2\ \text{A}&8\ \text{s}\\\end{array}

Allowed droop sets deterministic holdup time

The capacitor can support the load for the exact time allowed by charge balance.

\Delta t = {C\Delta V \over I} = 4\ \text{F}\cdot3\ \text{V}/2\ \text{A}=6\ \text{s}