A logic input is accepted only after low, middle, and high voltage cases are checked against the same thresholds. Exact arithmetic here means exact results for the stated model inputs; measured inputs still carry uncertainty and significant-figure limits.

highlighted = computed this step

A logic input is a banded voltage measurement

The scan fixes the low and high thresholds, then varies only the input voltage. That makes the boundary rule visible as rows, not as prose.

Vin1 VLOW,Vin4 VHIGHV_{\text{in}}\le 1\ \text{V}\Rightarrow\text{LOW},\quad V_{\text{in}}\ge 4\ \text{V}\Rightarrow\text{HIGH}
Input band setupThe middle reading sits between the two accepted bands.V2 VV1 VV4 VinputLOWHIGHINVALID

Five rows show below, edge, middle, edge, and above

The reader can scan the input column downward and see exactly where the accepted LOW band ends and the accepted HIGH band begins.

VinVLOWVHIGHstate0 V1 V4 VLOW1 V1 V4 VLOW2 V1 V4 VINVALID4 V1 V4 VHIGH5 V1 V4 VHIGH\begin{array}{c|c|c|c}V_{\text{in}}&V_{\text{LOW}}&V_{\text{HIGH}}&\text{state}\\0\ \text{V}&1\ \text{V}&4\ \text{V}&\text{LOW}\\1\ \text{V}&1\ \text{V}&4\ \text{V}&\text{LOW}\\2\ \text{V}&1\ \text{V}&4\ \text{V}&\text{INVALID}\\4\ \text{V}&1\ \text{V}&4\ \text{V}&\text{HIGH}\\5\ \text{V}&1\ \text{V}&4\ \text{V}&\text{HIGH}\\\end{array}
High edge rowEquality at the high threshold is accepted as HIGH.V4 VV1 VV4 VinputLOWHIGHHIGH

The middle row is a rejected measurement

The middle row is not rounded to a bit. It blocks the ideal logic chain because it is greater than the low threshold and less than the high threshold.

1 V<2 V<4 VINVALID1\ \text{V}<2\ \text{V}<4\ \text{V}\Rightarrow\text{INVALID}
Invalid input rowThe classifier rejects the middle voltage.V2 VV1 VV4 VinputLOWHIGHINVALID