A compact table is useful only because its cells are regenerated from the switch topology. Exact arithmetic here means exact results for the stated model inputs; measured inputs still carry uncertainty and significant-figure limits.

highlighted = computed this step

A wrong NAND label cannot override wires

The NAND table is generated from the same series pull-down topology used in the diagram.

ABY001011101110\begin{array}{ccc} A&B&Y\\0&0&1\\0&1&1\\1&0&1\\1&1&0\end{array}
NAND series pull-downBoth inputs HIGH close the series path, so this representative NAND row pulls the output LOW.5 V5 ohmclosedclosedV0 V1 A+-5 VNANDLOW

A NOR table is a different topology audit

The NOR table is generated from parallel pull-down branches. The lesson never copies NAND cells into NOR by hand.

ABY001010100110\begin{array}{ccc} A&B&Y\\0&0&1\\0&1&0\\1&0&0\\1&1&0\end{array}
NOR parallel pull-downBoth inputs LOW leave both pull-down branches open, so this representative NOR row stays HIGH.5 V5 ohmopenopenV5 VNORHIGH

Different wires give different accepted tables

The compact tables are accepted because each output cell is recomputed from the corresponding topology. The names NAND and NOR are not enough; the wire graph decides which rows are LOW.

series pull-downparallel pull-down\text{series pull-down} \ne \text{parallel pull-down}
Topology is the sourceThis checked NAND graph is the source for the NAND cells; changing the label alone cannot change it.5 V5 ohmclosedclosedV0 V1 A+-5 VNANDLOW