Timing Relation Cross Scans

Edge Capture State Three-Row Scan

An edge-capture state scan ties timing validity to the state update rule: accepted edges copy D, while rejected timing keeps the prior state. The rows are exact only for the declared setup and hold slack, clock edge, input value, prior state, and ideal flip-flop assumptions; real systems add jitter, skew, metastability, threshold variation, data slew, PVT drift, load-dependent delay, and time/voltage measurement uncertainty.

Accepted timing copies input while rejected timing keeps prior state. Exact arithmetic here means exact results for the stated model inputs; measured inputs still carry uncertainty and significant-figure limits.

highlighted = computed this step

Accepted timing lets a zero input replace one

Setup slack 3 s and hold slack 1 s make the edge gate capture. Input 0 and prior state 1 produce output 0.

D=0,Qold=1,Qnew=0D=0,\quad Q_{\text{old}}=1,\quad Q_{\text{new}}=0
Edge capture state scanAccepted rows copy D; rejected rows keep prior state.period 10 sedges 2edge 1 at 10 slast 10 sedge 1 at 10 sdata 5 snext 12 ssetup slack 3 shold slack 1 sacceptededge 1D 0prior 1Q 0captured

Accepted timing lets a one input replace zero

Setup slack 3 s and hold slack 1 s make the edge gate capture. Input 1 and prior state 0 produce output 1.

D=1,Qold=0,Qnew=1D=1,\quad Q_{\text{old}}=0,\quad Q_{\text{new}}=1
Edge capture state scanAccepted rows copy D; rejected rows keep prior state.period 10 sedges 2edge 1 at 10 slast 10 sedge 1 at 10 sdata 5 snext 12 ssetup slack 3 shold slack 1 sacceptededge 1D 1prior 0Q 1captured

Rejected timing keeps the prior state

Setup slack -1 s and hold slack 1 s make the edge gate hold. Input 1 and prior state 0 produce output 0.

D=1,Qold=0,Qnew=0D=1,\quad Q_{\text{old}}=0,\quad Q_{\text{new}}=0
Edge capture state scanAccepted rows copy D; rejected rows keep prior state.period 10 sedges 2edge 1 at 10 slast 10 sedge 1 at 10 sdata 9 snext 12 ssetup slack -1 shold slack 1 srejectededge 1D 1prior 0Q 0held