A signal-as-a-choice scan maps each signal state to a switch state across rows, checking that HIGH closes a conducting path and LOW opens a broken one before any current size is computed. The arithmetic is exact only for the stated signal states, switch states, path states, and rows in the ideal switch and ideal logic-level model. Real circuits add contact resistance, leakage, finite rise time, supply tolerance, load impedance, probe/calibration limits, finite precision, and measurement uncertainty.
Electronic signals can be modelled as choices that open or close an ideal switch. Exact arithmetic here means exact results for the stated model inputs; measured inputs still carry uncertainty and significant-figure limits.
highlighted = computed this step
A low signal means open
In this simplified electronic model, a LOW signal is represented by an open switch.
LOW⇒open
A high signal means closed
A HIGH signal is represented by a closed switch, so the load has a conducting path.
HIGH⇒closed
The signal chooses topology before size
The signal state decides whether the path exists. Current size comes after that graph choice.